I have a doubt. Suppose we have few components like external RAM, external flash etc and we don’t need them as part of bootloader, Do you set anything for those components GPIO pins (for example set them analog input) or just ignore them?
In one of my project I was using external flash W25Q80 and whenever I use to flash a program which doesn’t include GPIO initialization for same component, External flash used to stop working from next time. Don’t know if that make any sense.
Also you have motioned that STM has few scratch registers for mailbox. Can you please name them ?
Great question @chandan_bhatia! This will depend on the default pin behavior of your MCU, and the default behavior of your peripheral. In general, I recommend explicitly configuring your GPIOs to avoid unpleasant surprising. For example, a pin left floating (GPIO @ high-z) will sometimes upset your peripheral.
The correct GPIO configuration should hold peripherals you don’t need in reset, or cut their power. For example, I would hold any unneeded !CS pin high. Some designs will guarantee this at the electrical level by adding pull ups / pull downs on those GPIOs in which case you don’t have as much to worry about.
They are the “RTC Backup Registers”. e.g. RTC_BKP_DR0.
@francois Thanks for reply. By cutting unused component power, Do you mean that don’t enable clock for same PORT? For example external flash pins are on PORT C, so shouldn’t enable same PORT clock
Suppose one of my component (eg. External Flash) pins are connected on PORT C but I can’t stop clock of PORT C as other required GPIOs are on same port. In that case should I configure my external flash GPIOs? Suppose its SPI flash so I should just initialized those pins but don’t configure SPI. Correct ?
@chandan_bhatia note I moved this to a new topic since it was getting long.
Let’s take the example of the SPI flash. Typically, you’ll have 8 pins:
VDD
VSS
DO
DI
CS#
WP
HOLD
GND
In my opinion, the “correct” pin values when you’re not planning to use this IC is:
VDD: ideally not powered
VSS: ideally not powered
DO: don’t care, so leaving GPIO in high-Z is fine.
DI: same as DO
CS#: held HIGH so chip select is not asserted
WP#: held HIGH so write protect is not asserted (this is sometimes tied to VDD)
HOLD#: held HIGH so hold is not asserted (this is sometimes tied to VDD)
GND: tied to ground
So typically you only need to configure whichever GPIO controls CS so that it is held high, and potentially whatever GPIO is controlling the regulator for VDD/VSS if you have flexibility in disabling them only for the flash chip.
If you do not do that, you risk data getting clocked into the flash chip by mistake as CS / DO / DI float.