Interrupt

ARM Cortex-M33 Instruction Tracing Without a Debugger | Interrupt

In a previous post, we talked about debugging memory corruption issues by making use of watchpoints. You may recall in that post we had to reproduce the failure so we could halt the core with a watchpoint installed in order to debug what happened.


This is a companion discussion topic for the original entry at https://interrupt.memfault.com/blog/instruction-tracing-mtb-m33

Thanks for the article. it seems like this feature is also available on cortex m0+ but not on cortex m4 ? am i correct? is there a similar feature in cortex m4?

Cortex-M4 has the ETB (Embedded Trace Buffer), which is similar albeit a little more complicated. Note that both MTB and ETB are optional features, so not every microcontroller will implement them.

I’ve found some discussion regarding use of the ETM in STM32H7 processors. Maybe it sheds some light on this subject!

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