Stumbled on this old post @ francois. Quite informative. Keep the blogs coming. WRT to this i2c debug post and flowchart, perhaps there’s one more step to be added. I’ve seen cases [in multi-slave configs, or just in general when power is cycled mid transaction, for example] where the slave holds the SDA line low. General debug technique here, and you can programmatically automate this part is where you’d send a few clocks from the master to help the slave transition out of whatever ‘corrupted’ state it may be in.