GNU Make Overview and Guidelines | Interrupt

GNU Make is a popular and commonly used program for building C language software. It is used when building the Linux kernel and other frequently used GNU/Linux programs and software libraries.

This is a companion discussion topic for the original entry at

Great post! I really needed some explanation about the basics of Make.
I have one question: in the section about “Pattern Rules” there is this rule

# Use CC to link foo.o + bar.o into 'program'
program: $(OBJ_FILES)
	$(CC) -o $@ $<

I am not 100% sure, but shouldn’t it be like this (with the “$^” automatic variable so that it takes all the prerequisites)?

# Use CC to link foo.o + bar.o into 'program'
program: $(OBJ_FILES)
	$(CC) -o $@ $^
1 Like

Great catch! you’re right, the rule should take all the prerequisites in that example, I’ll update it now.