A Simple Scheduler via an Interrupt-driven Actor Model | Interrupt

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Using an RTOS is often a tradeoff between the ease of decomposing tasks, with the complexity of the scheduler itself. There exists a middle ground between highly complex systems that may require an RTOS, and simpler ones that can be easily modeled using a super loop.Since ARM is the most popular embedded CPU and almost every ARM processor has a hardware scheduler, it would be interesting to make a compact framework utilizing these features. The most popular approach to RTOS-less event-driven systems is super-loop consuming events produced by interrupts. This article discusses an alternative, more efficient approach in some circumstances. It has less overhead than an RTOS and also benefits event-driven systems.

This is a companion discussion topic for the original entry at https://interrupt.memfault.com/blog/hardware-actor-scheduler
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Although the content is very interesting, I think the article is written poorly. The author jumps from theory to implementation details back and forth without a proper structure. In the end, we are left with some ideas but no practical conclusions. It feels like this should have been an academic paper draft instead of an Interrupt blog post. Is there a library implementing this concept? One project I know which uses hardware scheduling is the RTIC framework written in Rust, but I’m not sure if it is the same thing.

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Thanks for your reply! I have implemented the described concept in C and in C++20 (with async/await) in my github. These still at alpha-stage due to lack of time, and they also lack some useful things like timers but I hope sometime I will implement it. However, my intent in the article was to show that this type of framework may be written for the specific task within 2-3 hours, with desired code style and other functionality. Also, the example in the article is the same cross-platform header as in my project with some renames.

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This is a very nice idea and I’m glad that more engineers have discovered this way of utilizing the standard NVIC in the Cortex-M CPU. If anybody has trouble understanding this particular “Simple Scheduler” explanation, I have presented a similar subject at the Embedded Online Conference (April 2023). The videos from that presentation entitled “Super-Simple Tasker - Hardware RTOS for ARM Cortex-M” are freely available on YouTube:

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This is awful. Simply use cooperative scheduler and FSM until it’s not enough.
Polling is always more deterministic than events.
Which is more important quality of the product or sqeezing every last joule out?