I think it is worth mentioning that the I2C bus can be stuck and then require a bus reset if the master cannot finish an access. It can happen if the master soft reset during a communication and the slave does not.
The issue is described and solved in the application note: https://www.analog.com/media/en/technical-documentation/application-notes/54305147357414AN686_0.pdf
Thank you for sharing all these blog posts. This is rare and good content.