# ARM Cortex-M RTOS Context Switching | Interrupt

**URL:** <https://community.memfault.com/t/arm-cortex-m-rtos-context-switching-interrupt/95>\
**Category:** Blog\
**Created:** [October 30, 2019, 5:38am UTC](https://community.memfault.com/t/arm-cortex-m-rtos-context-switching-interrupt/95 "2019-10-30T05:38:31Z")\
**Posts on this page:** 5\
**Page:** 1

<div class="post-metadata">

**Author:** ![discobot](https://yyz2.discourse-cdn.com/flex030/user_avatar/community.memfault.com/discobot/32/1_2.png) [@discobot](https://community.memfault.com/u/discobot)\
**Post date:** [October 30, 2019, 5:38am UTC](https://community.memfault.com/t/arm-cortex-m-rtos-context-switching-interrupt/95/1 "2019-10-30T05:38:31Z")

</div>

Many embedded systems reach a level of complexity where having a basic set of scheduling primitives and ability to run different tasks can be helpful. The operation of switching from one task to another is known as a **context switch**. A _Real Time Operating System_ ( **RTOS** ) will typically provide this functionality. Having a foundational knowledge of how the core of an **RTOS** works can be a valuable skill set for an embedded engineer to have.

* * *
This is a companion discussion topic for the original entry at [https://interrupt.memfault.com/blog/cortex-m-rtos-context-switching](https://interrupt.memfault.com/blog/cortex-m-rtos-context-switching)

---

<div class="post-metadata">

**Author:** ![chandan\_bhatia](https://yyz2.discourse-cdn.com/flex030/user_avatar/community.memfault.com/chandan_bhatia/32/44_2.png) [@chandan\_bhatia](https://community.memfault.com/u/chandan_bhatia)\
**Post date:** [August 27, 2020, 3:56am UTC](https://community.memfault.com/t/arm-cortex-m-rtos-context-switching-interrupt/95/2 "2020-08-27T03:56:36Z")

</div>

Nice blog. I am looking for best opensource tool to trace FreeRTOS tasks. Any suggestion?

---

<div class="post-metadata">

**Author:** ![chandan\_bhatia](https://yyz2.discourse-cdn.com/flex030/user_avatar/community.memfault.com/chandan_bhatia/32/44_2.png) [@chandan\_bhatia](https://community.memfault.com/u/chandan_bhatia)\
**Post date:** [September 3, 2020, 11:06am UTC](https://community.memfault.com/t/arm-cortex-m-rtos-context-switching-interrupt/95/3 "2020-09-03T11:06:34Z")

</div>

Also from you experiences can you suggest when to use static Memory Allocation and when Dynamic in FreeRTOS ? I always have a doubt.

Thanks

---

<div class="post-metadata">

**Author:** ![JimYuill](https://avatars.discourse-cdn.com/v4/letter/j/74df32/32.png) [@JimYuill](https://community.memfault.com/u/JimYuill)\
**Post date:** [February 4, 2023, 3:39pm UTC](https://community.memfault.com/t/arm-cortex-m-rtos-context-switching-interrupt/95/4 "2023-02-04T15:39:41Z")

</div>

Great article–thanks!

---

<div class="post-metadata">

**Author:** ![Christalization](https://avatars.discourse-cdn.com/v4/letter/c/ea5d25/32.png) [@Christalization](https://community.memfault.com/u/Christalization)\
**Post date:** [February 28, 2025, 6:07pm UTC](https://community.memfault.com/t/arm-cortex-m-rtos-context-switching-interrupt/95/5 "2025-02-28T18:07:35Z")

</div>

Correct me if I am wrong but I’m pretty sure there is a significant bug in the above assembly code where it conditionally stacks the FPU.

```auto
tst r14, #0x10
it eq
vstmbeq r0!, {s16-s31}

```

Shouldn’t “it eq” be “it ne”? The tst instruction will set the zero flag according to the result, so if the bit is set, i.e r14 & 0x10 is true (1), Z flag will be zero and the “EQ” will thus not execute.
